AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 111

• Manufacturer Part Number: AT83C51SND1C_03
• Description: Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
• Manufacturer: ATMEL [ATMEL Corporation]

Figure 71. (Multiple) Block Read Operation
Figure 72. Sequential Write Operation
Figure 73. Multiple Block Write Operation
Figure 74. No Response and No Data Operation
Command Token Format
Figure 75. Command Token Format
4109E–8051–06/03
MCMD
MDAT
MCMD
MDAT
MCMD
MDAT
Command
Command
Command
MCMD
MDAT
Block Read Operation
Response
As shown in Figure 72 and Figure 73 the data write operation uses a simple busy signal-
ling of the write operation duration on the data line (MDAT).
As shown in Figure 75, commands have a fixed code length of 48 bits. Each command
token is preceded by a Start bit: a low level on MCMD line and succeeded by an End bit:
a high level on MCMD line. The command content is preceded by a Transmission bit: a
high level on MCMD line for a command token (host to card) and succeeded by a 7 - bit
CRC so that transmission errors can be detected and the operation may be repeated.
Command content contains the command index and address information or parameters.
Response
Block Write Operation
Response
Command
Data Block
Multiple Block Read Operation
0
No Response Operation
Data Block CRC
Data Transfer Operation
1
CRC
Multiple Block Write Operation
Total Length = 48 bits
Data Block CRC Data Block CRC
Content
Status
Data Stream
Busy
Command
No Data Operation
CRC
Data Block CRC
1
Response
Stop Command
Stop Command
Command
Command
Data Stop Operation
Data Stop Operation
Stop Command
Command
AT8xC51SND1C
Data Stop Operation
Status
Response
Response
Busy
Response
Busy
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