AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 79

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AT83C51SND1C_03

Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
4109E–8051–06/03
Table 86. AUDSTA Register
AUDSTA (S:9Ch Read Only) – Audio Interface Status Register
Reset Value = 1100 0000b
Table 87. AUDDAT Register
AUDDAT (S:9Dh) – Audio Interface Data Register
Reset Value = 1111 1111b
Table 88. AUDCLK Register
AUDCLK (S:ECh) – Audio Clock Divider Register
Reset Value = 0000 0000b
Number
Number
Number
SREQ
AUD7
4 - 0
7 - 0
7 - 5
4 - 0
Bit
Bit
Bit
7
7
7
-
7
6
5
Mnemonic Description
Mnemonic Description
Mnemonic Description
AUCD4:0
AUBUSY
AUD7:0
UDRN
AUD6
SREQ
UDRN
Bit
Bit
Bit
6
6
6
-
-
-
Audio Sample Request Flag
Set in C51 audio source mode when the audio interface request samples (buffer
half empty). This bit generates an interrupt if not masked and if enabled in IEN0.
Cleared by hardware when samples are loaded in AUDDAT.
Audio Sample Under-run Flag
Set in C51 audio source mode when the audio interface runs out of samples
(buffer empty). This bit generates an interrupt if not masked and if enabled in
IEN0.
Cleared by hardware when samples are loaded in AUDDAT.
Audio Interface Busy Bit
Set in C51 audio source mode when the audio interface can not accept more
sample (buffer full).
Cleared by hardware when buffer is no more full.
Reserved
The value read from these bits is always 0. Do not set these bits.
Audio Data
8-bit sampling data for voice or sound playing.
Reserved
The value read from these bits is always 0. Do not set these bits.
Audio Clock Divider
5-bit divider for audio clock generation.
AUBUSY
AUD5
5
5
5
-
AUCD4
AUD4
4
4
4
-
AUCD3
AUD3
3
3
3
-
AT8xC51SND1C
AUCD2
AUD2
2
2
2
-
AUCD1
AUD1
1
1
1
-
AUCD0
AUD0
0
0
0
-
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