AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 52

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AT83C51SND1C_03

Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Figure 28. Timer 0 and Timer 1 Clock Controller and Symbols
Timer 0
Mode 0 (13-bit Timer)
Figure 29. Timer/Counter x (x = 0 or 1) in Mode 0
Figure 30. Mode 0 Overflow Period Formula
52
AT8xC51SND1C
CLOCK
INTx
CLOCK
CLOCK
TIMx
OSC
Tx
PER
TMOD Reg
Timer 0 Clock Symbol
GATEx
CLOCK
÷ 6
TIM0
÷
2
TMOD Reg
C/Tx#
CKCON.1
TCON Reg
T0X2
0
1
Timer 0 functions as either a Timer or event Counter in four modes of operation.
Figure 29 through Figure 35 show the logical configuration of each mode.
Timer 0 is controlled by the four lower bits of TMOD register (see Table 61) and bits 0, 1,
4 and 5 of TCON register (see Table 60). TMOD register selects the method of Timer
gating (GATE0), Timer or Counter operation (C/T0#) and mode of operation (M10 and
M00). TCON register provides Timer 0 control functions: overflow flag (TF0), run control
bit (TR0), interrupt flag (IE0) and interrupt type control bit (IT0).
For normal Timer operation (GATE0 = 0), setting TR0 allows TL0 to be incremented by
the selected input. Setting GATE0 and TR0 allows external pin INT0 to control Timer
operation.
Timer 0 overflow (count rolls over from all 1s to all 0s) sets TF0 flag generating an inter-
rupt request.
It is important to stop Timer/Counter before changing mode.
Mode 0 configures Timer 0 as a 13-bit Timer which is set up as an 8-bit Timer (TH0 reg-
ister) with a modulo 32 prescaler implemented with the lower five bits of TL0 register
(see Figure 29). The upper three bits of TL0 register are indeterminate and should be
ignored. Prescaler overflow increments TH0 register. Figure 30 gives the overflow
period calculation formula.
0
1
TRx
TFx
PER
=
6 ⋅
Timer 0 Clock
(16384 – (THx, TLx))
F
TIMx
(5 Bits)
TLx
CLOCK
CLOCK
OSC
PER
Timer 1 Clock Symbol
(8 Bits)
THx
CLOCK
TIM1
÷
2
Overflow
CKCON.2
T1X2
0
1
TCON reg
TFx
Timer 1 Clock
Timer x
Interrupt
Request
4109E–8051–06/03

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