AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 53
AT83C51SND1C_03
Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C51SND1C_03.pdf
(210 pages)
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Mode 1 (16-bit Timer)
Figure 31. Timer/Counter x (x = 0 or 1) in Mode 1
Figure 32. Mode 1 Overflow Period Formula
Mode 2 (8-bit Timer with Auto-
Reload)
Figure 33. Timer/Counter x (x = 0 or 1) in Mode 2
Figure 34. Mode 2 Autoreload Period Formula
Mode 3 (2 8-bit Timers)
4109E–8051–06/03
INTx
INTx
CLOCK
CLOCK
TIMx
TIMx
Tx
Tx
TMOD Reg
TMOD reg
GATEx
GATEx
÷ 6
÷ 6
TMOD Reg
TMOD reg
C/Tx#
C/Tx#
Mode 1 configures Timer 0 as a 16-bit Timer with TH0 and TL0 registers connected in
cascade (see Figure 31). The selected input increments TL0 register. Figure 32 gives
the overflow period calculation formula when in timer mode.
Mode 2 configures Timer 0 as an 8-bit Timer (TL0 register) that automatically reloads
from TH0 register (see Table 62). TL0 overflow sets TF0 flag in TCON register and
reloads TL0 with the contents of TH0, which is preset by software. When the interrupt
request is serviced, hardware clears TF0. The reload leaves TH0 unchanged. The next
reload value may be changed at any time by writing it to TH0 register. Figure 34 gives
the autoreload period calculation formula when in timer mode.
Mode 3 configures Timer 0 such that registers TL0 and TH0 operate as separate 8-bit
Timers (see Figure 35). This mode is provided for applications requiring an additional 8-
bit Timer or Counter. TL0 uses the Timer 0 control bits C/T0# and GATE0 in TMOD reg-
ister, and TR0 and TF0 in TCON register in the normal manner. TH0 is locked into a
Timer function (counting F
run control (TR1) bits. Thus, operation of Timer 1 is restricted when Timer 0 is in mode
0
1
0
1
TCON Reg
TCON reg
TRx
TRx
TFx
PER
TFx
=
PER
6
=
⋅
(65536 – (THx, TLx))
6
⋅
TF1
(256 – THx)
F
F
(8 bits)
TIMx
TIMx
/6) and takes over use of the Timer 1 interrupt (TF1) and
THx
(8 bits)
(8 bits)
THx
TLx
(8 bits)
TLx
Overflow
Overflow
TCON Reg
TCON reg
AT8xC51SND1C
TFx
TFx
Timer x
Interrupt
Request
Timer x
Interrupt
Request
53
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