AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 122

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AT83C51SND1C_03

Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Data Reading
Figure 87. Data Stream Reception Flows
122
AT8xC51SND1C
read 8 data from MMDAT
a. Polling mode
STOP Command
F1FI or F2FI = 1?
Data Stream
FIFO Reading
No More Data
To Receive?
Reception
FIFO Full?
Send
This time-out may be disarmed after receiving 8 data (F1FI flag set) or after receiving
end of frame (EOFI flag set) in case of block length less than 8 data (1, 2 or 4).
Data is read from the FIFO by reading to MMDAT register. Each time one FIFO
becomes full (F1FI or F2FI set), user is requested to flush this FIFO by reading 8 data.
Unmask FIFOs Full
Data Stream
Initialization
F1FM = 0
F2FM = 0
b. Interrupt mode
read 8 data from MMDAT
STOP Command
Reception ISR
F1FI or F2FI = 1?
Mask FIFOs Full
Data Stream
FIFO Reading
No More Data
To Receive?
FIFO Full?
F1FM = 1
F2FM = 1
Send
4109E–8051–06/03

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