AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 14
AT83C51SND1C_03
Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C51SND1C_03.pdf
(210 pages)
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PLL Programming
14
AT8xC51SND1C
Figure 9. PLL Filter Connection
The PLL is programmed using the flow shown in Figure 10. As soon as clock generation
is enabled, the user must wait until the lock indicator is set to ensure the clock output is
stable. The PLL clock frequency will depend on MP3 decoder clock and audio interface
clock frequencies.
Figure 10. PLL Programming Flow
FILT
Configure Dividers
R9:0 = xxxxxxxxxxb
Programming
N6:0 = xxxxxxb
PLOCK = 1?
PLL Locked?
PLLRES = 0
Enable PLL
PLLEN = 1
VSS
PLL
R
C1
VSS
C2
4109E–8051–06/03
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