AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 194
AT83C51SND1C_03
Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C51SND1C_03.pdf
(210 pages)
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Two-wire Interface
Timings
Waveforms
194
AT8xC51SND1C
(INPUT/OUTPUT)
(INPUT/OUTPUT)
SDA
SCL
START or Repeated START condition
Table 167. TWI Interface AC Timing
V
Notes:
Figure 150. Two Wire Waveforms
T
DD
hd
;STA
T
T
T
T
= 2.7 to 3.3 V, T
T
T
T
T
Symbol
SU
SU
SU
fd
SU
HD
HD
SU
T
T
T
T
T
; DAT1
; DAT2
; DAT3
T
T
HIGH
; STO
LOW
; DAT
; STA
; STA
BUF
RC
RD
FC
FD
1. At 100 kbit/s. At other bit-rates this value is inversely proportional to the bit-rate of
2. Determined by the external bus-line capacitance and the external bus-line pull-up
3. Spikes on the SDA and SCL lines with a duration of less than 3·T
4. T
T
100 kbit/s.
resistor, this must be < 1 µs.
out. Maximum capacitance on bus-lines SDA and
SCL= 400 pF.
low
CLCL
T
T
= T
Start condition hold time
SCL low time
SCL high time
SCL rise time
SCL fall time
Data set-up time
SDA set-up time (before repeated START condition)
SDA set-up time (before STOP condition)
Data hold time
Repeated START set-up time
STOP condition set-up time
Bus free time
SDA rise time
SDA fall time
rd
high
T
rc
OSC
Tsu;DAT1
A
= one oscillator clock period.
= -40 to +85°C
T
hd;
DAT
Parameter
T
fc
STOP condition
Repeated START condition
Tsu;DAT
T
su;
DAT3
2
T
14·T
16·T
14·T
14·T
14·T
14·T
T
0.3 V
su
su
INPUT
250 ns
250 ns
250 ns
0.3 µs
0.3 µs
0.7 V
;STO
Max
1 µs
0 ns
1 µs
Min
;STA
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
DD
DD
(4)
(4)
(4)
(4)
(4)
(4)
CLCL
T
buf
START condition
4109E–8051–06/03
20·T
8·T
will be filtered
OUTPUT
8·T
CLCL
4.0 µs
4.7 µs
4.0 µs
0.3 µs
4.7 µs
4.0 µs
4.7 µs
0.3 µs
CLCL
0.7 V
1 µs
Max
Min
0.3 V
-
CLCL
-
(2)
(4)
(2)
(4)
(1)
DD
(1)
(1)
(1)
(3)
(1)
(1)
(1)
(3)
- T
(4)
- T
DD
FC
RD
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