AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 116
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AT83C51SND1C_03
Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C51SND1C_03.pdf
(210 pages)
- Current page: 116 of 210
- Download datasheet (2Mb)
Command Line
Controller
Figure 81. Command Line Controller Block Diagram
Command Transmitter
116
AT8xC51SND1C
Command Transmitter
Command Receiver
RX Pointer
TX Pointer
MMCON0.4
MMCON0.5
CRPTR
CTPTR
17 - Byte FIFO
5-Byte FIFO
MMCMD
MMCMD
MMSTA.0
CFLCK
Read
Write
As shown in Figure 81, the command line controller is divided in 2 channels: the com-
mand transmitter channel that handles the command transmission to the card through
the MCMD line and the command receiver channel that handles the response reception
from the card through the MCMD line. These channels are detailed in the following
sections.
For sending a command to the card, user must load the command index (1 Byte) and
argument (4 Bytes) in the command transmit FIFO using the MMCMD register. Before
starting transmission by setting and clearing the CMDEN bit in MMCON1 register, user
must first configure:
•
•
•
Figure 82 summarizes the command transmission flow.
As soon as command transmission is enabled, the CFLCK flag in MMSTA is set indicat-
ing that write to the FIFO is locked. This mechanism is implemented to avoid command
overrun.
The end of the command transmission is signalled to you by the EOCI flag in MMINT
register becoming set. This flag may generate an MMC interrupt request as detailed in
Section "Interrupt", page 124. The end of the command transmission also resets the
CFLCK flag.
RESPEN bit in MMCON1 register to indicate whether a response is expected or not.
RFMT bit in MMCON0 register to indicate the response size expected.
CRCDIS bit in MMCON0 register to indicate whether the CRC7 included in the
response will be computed or not. In order to avoid CRC error, CRCDIS may be set
for response that do not include CRC7.
MMCON1.0
Data Converter
CMDEN
Data Converter
RESPEN
MMCON1.1
// -> Serial
Serial -> //
Finished State Machine
Finished State Machine
RX COMMAND Line
TX COMMAND Line
MMCON0.1
RFMT
MMSTA.2
CRC7S
CRC7 and Format
MMCON0.0
Generator
CRCDIS
CRC7
Checker
RESPFS
MMSTA.1
MMINT.5
MMINT.6
EOCI
EORI
MCMD
4109E–8051–06/03
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