AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 24
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AT83C51SND1C_03
Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C51SND1C_03.pdf
(210 pages)
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Upper 128 Bytes RAM
Expanded RAM
24
AT8xC51SND1C
Figure 16. Lower 128 Bytes Internal RAM Organization
The upper 128 Bytes of RAM are accessible from address 80h to FFh using only indirect
addressing mode.
The on-chip 2K Bytes of expanded RAM (ERAM) are accessible from address 0000h to
07FFh using indirect addressing mode through MOVX instructions. In this address
range, EXTRAM bit in AUXR register (see Table 29) is used to select the ERAM
(default) or the XRAM. As shown in Figure 15 when EXTRAM = 0, the ERAM is selected
and when EXTRAM = 1, the XRAM is selected (see Section “External Space”).
The ERAM memory can be resized using XRS1:0 bits in AUXR register to dynamically
increase external access to the XRAM space. Table 26 details the selected ERAM size
and address range.
Table 26. ERAM Size Selection
Note:
XRS1
Lower 128 Bytes RAM, Upper 128 Bytes RAM, and expanded RAM are made of volatile
memory cells. This means that the RAM content is indeterminate after power-up and
must then be initialized properly.
0
0
1
1
XRS0
0
1
0
1
30h
20h
18h
10h
08h
00h
ERAM Size
256 Bytes
512 Bytes
1K Byte
2K Bytes
7Fh
2Fh
1Fh
0Fh
17h
07h
Bit-Addressable Space
(Bit Addresses 0-7Fh)
4 Banks of
8 Registers
R0-R7
Address
0 to 00FFh
0 to 01FFh
0 to 03FFh
0 to 07FFh
4109E–8051–06/03
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