AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 121

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AT83C51SND1C_03

Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Figure 86. Data Block Transmission Flows
Data Receiver
Configuration
Data Reception
4109E–8051–06/03
write 16 data to MMDAT
write 8 data to MMDAT
a. Polling mode
Start Transmission
F1EI or F2EI = 1?
Transmission
No More Data
FIFO Empty?
Data Block
FIFOs Filling
FIFO Filling
DATEN = 1
DATEN = 0
To Send?
To receive data from the card you must first configure the data controller in reception
mode by clearing the DATDIR bit in MMCON1 register.
Figure 87 summarizes the data stream reception flows in both polling and interrupt
modes while Figure 88 summarizes the data block reception flows in both polling and
interrupt modes, these flows assume that block length is greater than 16 Bytes.
The end of a data frame (block or stream) reception is signalled to you by the EOFI flag
in MMINT register. This flag may generate an MMC interrupt request as detailed in Sec-
tion "Interrupt", page 124. When this flag is set, 2 other flags in MMSTA register: DATFS
and CRC16S give a status on the frame received. DATFS indicates if the frame format
is correct or not: a valid End bit has been received, and CRC16S indicates if the CRC16
computation is correct or not. In case of data stream CRC16S has no meaning and
stays cleared.
According to the MMC specification data transmission from the card starts after the
access time delay (formally N
mand. To avoid any locking of the MMC controller when card does not send its data
(e.g. physically removed from the bus), you must launch a time-out period to exit from
such situation. In case of time-out you may reset the data controller and its internal state
machine by setting and clearing the DCR bit in MMCON2 register.
write 16 data to MMDAT
Unmask FIFOs Empty
Start Transmission
Initialization
FIFOs Filling
Data Block
AC
DATEN = 1
DATEN = 0
F1EM = 0
F2EM = 0
parameter) beginning from the End bit of the read com-
b. Interrupt mode
write 8 data to MMDAT
Transmission ISR
Mask FIFOs Empty
F1EI or F2EI = 1?
AT8xC51SND1C
No More Data
FIFO Empty?
Data Block
FIFO Filling
To Send?
F1EM = 1
F2EM = 1
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