AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 118

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AT83C51SND1C_03

Manufacturer Part Number
AT83C51SND1C_03
Description
Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Data Line Controller
Figure 83. Data Line Controller Block Diagram
FIFO Implementation
Data Configuration
118
RX Pointer
TX Pointer
MMCON0.6
MMCON0.7
AT8xC51SND1C
DRPTR
DTPTR
MMINT.0
MMINT.1
F1EI
F2EI
16-Byte FIFO
MMDAT
FIFO 1
FIFO 2
8-Byte
8-Byte
MMINT.2
MMINT.3
F1FI
F2FI
The data line controller is based on a 16-Byte FIFO used both by the data transmitter
channel and by the data receiver channel.
The 16-Byte FIFO is based on a dual 8-Byte FIFOs managed using 2 pointers and four
flags indicating the status full and empty of each FIFO.
Pointers are not accessible to user but can be reset at any time by setting and clearing
DRPTR and DTPTR bits in MMCON0 register. Resetting the pointers is equivalent to
abort the writing or reading of data.
F1EI and F2EI flags in MMINT register signal when set that respectively FIFO1 and
FIFO2 are empty. F1FI and F2FI flags in MMINT register signal when set that respec-
tively FIFO1 and FIFO2 are full. These flags may generate an MMC interrupt request as
detailed in Section “Interrupt”.
Before sending or receiving any data, the data line controller must be configured accord-
ing to the type of the data transfer considered. This is achieved using the Data Format
bit: DFMT in MMCON0 register. Clearing DFMT bit enables the data stream format
while setting DFMT bit enables the data block format. In data block format, user must
also configure the single or multi-block mode by clearing or setting the MBLOCK bit in
MMCON0 register and the block length using BLEN3:0 bits in MMCON1 according to
Table 111. Figure 84 summarizes the data modes configuration flows.
Table 111. Block Length Programming
BLEN = 0000 to 1011
MMCON0.2
CRC16 and Format
DFMT
BLEN3:0
MMSTA.3
DATFS
MMINT.1
MCBI
> 1011
Data Converter
Checker
// -> Serial
MBLOCK
MMCON0.3
CRC16S
MMSTA.4
CBUSY
MMSTA.5
Finished State Machine
DATA Line
MMCON1.2
DATEN
Block Length (Byte)
Length = 2
Reserved: do not program BLEN3:0 > 1011
Data Converter
Serial -> //
Generator
MMCON1.3
DATDIR
CRC16
BLEN
: 1 to 2048
MMCON1.7:4
BLEN3:0
MMINT.4
EOFI
MDAT
4109E–8051–06/03

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