AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 143

• Manufacturer Part Number: AT83C51SND1C_03
• Description: Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
• Manufacturer: ATMEL [ATMEL Corporation]

Registers
4109E–8051–06/03
Table 125. SCON Register
SCON (S:98h) – Serial Control Register
Reset Value = 0000 0000b
Number
FE/SM0
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
OVR/SM1
REN
SM0
SM1
SM2
RB8
TB8
Bit
FE
6
TI
RI
Framing Error Bit
To select this function, set SMOD0 bit in PCON register.
Set by hardware to indicate an invalid stop bit.
Must be cleared by software.
Serial Port Mode Bit 0
Refer to Table 123 for mode selection.
Serial Port Mode Bit 1
Refer to Table 123 for mode selection.
Serial Port Mode Bit 2
Set to enable the multiprocessor communication and automatic address
recognition features.
Clear to disable the multiprocessor communication and automatic address
recognition features.
Receiver Enable Bit
Set to enable reception.
Clear to disable reception.
Transmit Bit 8
Modes 0 and 1: Not used.
Modes 2 and 3: Software writes the ninth data bit to be transmitted to TB8.
Receiver Bit 8
Mode 0: Not used.
Mode 1 (SM2 cleared): Set or cleared by hardware to reflect the stop bit
received.
Modes 2 and 3 (SM2 set): Set or cleared by hardware to reflect the ninth bit
received.
Transmit Interrupt Flag
Set by the transmitter after the last data bit is transmitted.
Must be cleared by software.
Receive Interrupt Flag
Set by the receiver after the stop bit of a frame has been received.
Must be cleared by software.
SM2
5
REN
4
TB8
3
AT8xC51SND1C
RB8
2
1
TI
RI
0
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