HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 156

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 4 Exception Handling
Table 4.4
Note: VBR: Vector base register
Rev. 2.00 Mar 09, 2006 page 130 of 906
REJ09B0292-0200
Exception Source
Power-on reset
Manual reset
Other exception handling
Vector table address offset: See table 4.3.
Vector number: See table 4.3.
2. External vector number fetches can be performed without using the auto-vector
3. The vector numbers and vector table address offsets for each on-chip peripheral
4. Vector numbers are set in the on-chip vector number register. See section 5.3, Register
5. The same vector number, 10, is generated for a DMAC DMA address error and an E-
numbers in this table.
module interrupt are given table 5.4, Interrupt Exception Vectors and Priorities, in
section 5, Interrupt Controller.
Descriptions, in section 5, Interrupt Controller, and section 11, Direct Memory Access
Controller, for more information.
DMAC DMA address error. (See table 4.3 (a).)
Both the address error flag (AE) in the DMAC’s DMA operation register (DMAOR) and
the address error control bit (AEC) in the E-DMAC’s E-DMAC operation control register
(EDOCR) must therefore be read in the exception service routine to determine which
DMA address error has occurred.
Calculating Exception Vector Table Addresses
(Vector table address) = (vector table address offset)
(Vector table address) = VBR + (vector table address offset)
Vector Table Address Calculation
= (vector number)
= VBR + (vector number)
4
4