HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 454

no-image

HD6417616

Manufacturer Part Number
HD6417616
Description
32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417616RFV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417616SFV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Bit 19—Transmit FIFO Underflow (TFUF): Indicates that underflow has occurred in the transmit
FIFO during frame transmission. Incomplete data is sent onto the line.
Bit 19: TFUF
0
1
Note: Whether E-DMAC operation continues or halts after underflow is controlled by the E-DMAC
Bit 18—Frame Received (FR): Indicates that a frame has been received and the receive descriptor
has been updated. This bit is set to 1 each time a frame is received.
Note: The actual receive frame status is indicated in the receive status field in the descriptor.
Bit 18: FR
0
1
Bit 17—Receive Descriptor Exhausted (RDE): This bit is set if the receive descriptor active bit
(RACT) setting is “inactive” (RACT = 0) when the E-DMAC reads a receive descriptor.
Bit 17: RDE
0
1
Note: When receive descriptor empty (RDE = 1) occurs, receiving can be restarted by setting
Bit 16—Receive FIFO Overflow (RFOF): Indicates that the receive FIFO has overflowed during
frame reception.
Bit 16: RFOF
0
1
Notes: 1. If there are a number of receive frames in the receive FIFO, they will not be sent to
Rev. 2.00 Mar 09, 2006 page 428 of 906
REJ09B0292-0200
operation control register (EDOCR).
RACT = 1 in the receive descriptor and initiating receiving.
2. Whether E-DMAC operation continues or halts after overflow is controlled by the E-
memory correctly. The status of the frame that caused the overflow is written back to
the receive descriptor.
DMAC operation control register (EDOCR).
Description
Underflow has not occurred
Underflow has occurred (interrupt source)
Description
Frame not received
Frame received (interrupt source)
Description
“1” receive descriptor active bit (RACT) detected
“0” receive descriptor active bit (RACT) detected (interrupt source)
Description
Overflow has not occurred
Overflow has occurred (interrupt source)
(Initial value)
(Initial value)
(Initial value)
(Initial value)

Related parts for HD6417616