HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 412

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 Ethernet Controller (EtherC)
Bit 0— MII Management Data Clock (MDC): Outputs the value set to this bit by the MDC pin
and supplies the MII with the management data clock.
For the method of accessing MII registers, see section 9.3.4, Accessing MII Registers.
9.2.5
The upper 32 bits of the 48-bit MAC address are set in MARH. The setting in this register is
normally made in the initialization process after a reset.
Note: The MAC address setting must not be changed while the transmitter and receiver are
Bits 31 to 0—MAC Address Bits 47 to 16 (MA47 to MA16): Used to set the upper 32 bits of the
MAC address.
Note: If the MAC address to be set in the SH7616 is 01-23-45-67-89-AB (hexadecimal), the
Rev. 2.00 Mar 09, 2006 page 386 of 906
REJ09B0292-0200
Initial value:
Initial value:
Initial value:
Initial value:
enabled. First return the EtherC and E-DMAC modules to their initial state by means of
the SWR bit in the E-DMAC mode register (EDMR), then make the new setting.
value set in this register is H'01234567.
MAC Address High Register (MAHR)
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
MA47
MA39
MA31
MA23
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
MA46
MA38
MA30
MA22
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
MA45
MA37
MA29
MA21
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
MA44
MA36
MA28
MA20
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
MA43
MA35
MA27
MA19
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
MA42
MA34
MA26
MA18
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
MA41
MA33
MA25
MA17
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
MA40
MA32
MA24
MA16
R/W
R/W
R/W
R/W
24
16
0
0
8
0
0
0