HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 423

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

9.2.16
FRECR is a 16-bit counter that indicates the number of frames input from the PHY-LSI for which
a receive error was indicated by the RX-ER pin. FRECR is incremented each time this pin
becomes active. When the value in this register reaches H'FFFF (65,535), the count is halted. The
counter value is cleared to 0 by a write to this register (the write value is immaterial).
Bits 31 to 16—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 15 to 0—Frame Receive Error Count 15 to 0 (FREC15 to FREC0): These bits indicate the
count of errors during frame reception.
Initial value:
Initial value:
Initial value:
Frame Receive Error Counter Register (FRECR )
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
FREC15 FREC14 FREC13 FREC12 FREC11 FREC10 FREC9
FREC7
R/W
R/W
31
15
—
R
0
0
7
0
FREC6
R/W
R/W
30
14
—
R
0
0
6
0
FREC5
R/W
R/W
29
13
—
R
0
0
5
0
FREC4
R/W
R/W
. . .
. . .
. . .
. . .
12
0
4
0
Rev. 2.00 Mar 09, 2006 page 397 of 906
Section 9 Ethernet Controller (EtherC)
FREC3
R/W
R/W
19
11
—
R
0
0
3
0
FREC2
R/W
R/W
18
10
—
R
0
0
2
0
FREC1
REJ09B0292-0200
R/W
R/W
17
—
R
0
9
0
1
0
FREC8
FREC0
R/W
R/W
16
—
R
0
8
0
0
0