HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 205
HD6417616
Manufacturer Part Number
HD6417616
Description
32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417616.pdf
(935 pages)
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5.3.22
Vector number setting register P (VCRP) is a 16-bit read/write register that sets the serial I/O with
FIFO (SIOF) receive overrun error interrupt and transmit underrun error interrupt vector numbers
(0–127).
VCRP is initialized to H'0000 by a reset. It is not initialized in standby mode.
Bits 15 and 7—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 14 to 8—Serial I/O with FIFO (SIOF) Receive Overrun Error Interrupt Vector Number 6 to 0
(RER0V6–RER0V0): These bits set the vector number for the serial I/O with FIFO (SIOF) receive
overrun error interrupt. There are seven bits, so the value can be set between 0 and 127.
Bits 6 to 0—Serial I/O with FIFO (SIOF) Transmit Underrun Error Interrupt Vector Number 6 to
0 (TER0V6–TER0V0): These bits set the vector number for the serial I/O with FIFO (SIOF)
transmit underrun error interrupt. There are seven bits, so the value can be set between 0 and 127.
Initial value:
Initial value:
Vector Number Setting Register P (VCRP)
R/W:
R/W:
Bit:
Bit:
15
—
—
R
R
0
7
0
RER0V6 RER0V5 RER0V4 RER0V3 RER0V2 RER0V1 RER0V0
TER0V6 TER0V5 TER0V4 TER0V3 TER0V2 TER0V1 TER0V0
R/W
R/W
14
0
6
0
R/W
R/W
13
0
5
0
R/W
R/W
12
0
4
0
Rev. 2.00 Mar 09, 2006 page 179 of 906
Section 5 Interrupt Controller (INTC)
R/W
R/W
11
0
3
0
R/W
R/W
10
0
2
0
REJ09B0292-0200
R/W
R/W
9
0
1
0
R/W
R/W
8
0
0
0
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