HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 534

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 11 Direct Memory Access Controller (DMAC)
Transfer Width
Transfer bus mode
Transfer address mode
Rev. 2.00 Mar 09, 2006 page 508 of 906
REJ09B0292-0200
Figure 11.34 DREQn Pin Input Detection Timing in Cycle-Steal Mode with Edge Detection
Clock
Bus cycle
DREQn
(Rising-edge
detection)
DACKn
(Active high)
If the DACKn signal is output a number of times, the first DACKn signal for the input DREQn
signal indicates the request acceptance start timing, and subsequently each clock edge is
sampled.
1st
acceptance
(Active high)
(Active high)
CPU
Bus cycle
DREQn
DACKn
Clock
Figure 11.33 DREQn/DACKn Handshaking
Byte/Word/Longword
Cycle-steal mode
Dual/single mode
CPU
1st
acceptance
2nd
acceptance
DMAC
CPU
DMAC
Blind zone
CPU
DACKn output timing
DREQn Detection
Method
Bus cycle
CPU
2nd
acceptance
Requests acceptable
DMAC
CPU
3rd
acceptance
CPU
Edge Detection
Read DACK/write
DACK
Basic bus cycle
DMAC
DMAC