HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 366

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 Bus State Controller (BSC)
accesses are performed; when connecting to a 16-bit width ROM, a maximum of 2 consecutive
accesses are performed. Figure 7.53 shows the relationship between data width and access size.
For cache filling and DMAC 16-byte transfers, longword accesses are repeated 4 times.
When one or more wait states are set for a burst ROM access, the WAIT pin is sampled. When the
burst ROM is set and 0 specified for waits, there are 2 access cycles from the second time on.
Figure 7.55 shows the timing.
Rev. 2.00 Mar 09, 2006 page 340 of 906
REJ09B0292-0200
8-bit bus-width longword access
8-bit bus-width word access
8-bit bus-width byte access
16-bit bus-width longword access
16-bit bus-width word access
16-bit bus-width byte access
32-bit bus-width longword access
32-bit bus-width word access
32-bit bus-width byte access
T1
T1
T1
T1
T1
T1
T1
T1
T1
Figure 7.53 Data Width and Burst ROM Access (1 Wait State)
Tw
Tw
Tw
Tw
Tw
Tw
Tw
Tw
Tw
T2
T2
T2
T2
T2
T2
T2
T2
T2
Tw
Tw
Tw
T2
T2
T2
Tw
T2
Tw
T2