HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 397

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

8.5
8.5.1
Cache memory is not initialized in a reset. Therefore, the cache must be initialized by software
before use. The cache is initialized by zeroizing all address array valid bits and LRU information.
The address array write function can be used to initialize each line, but it is simpler to initialize it
once by writing 1 to the CP bit in CCR. Figure 8.14 shows how to initialize the cache.
MOV.W
MOV.B
AND
MOV.B
OR
MOV.B
OR
MOV.B
Number of bits
Number of bits
Bit
Address
Bit
Address
Cache Use
Initialization
Address array read:
Address array write:
V: Valid bit
#H'FE92, R1
@R1, R0
#H'FE, R0
#R0, @R1
#H'10, R0
R0, @R1
#H'01, R0
R0, R1
Number of bits
Number of bits
Bit
Bit
Data
Data
31
31
3
3
011
011
29
29
28
28
Figure 8.13 Address Array Access
31
Figure 8.14 Cache Initialization
;
;
;
;
;
3
31
—
Cache disable
Cache purge
Cache enable
29
28
Tag address
—
19
19
Tag address
19
—
22
Rev. 2.00 Mar 09, 2006 page 371 of 906
10
10
9
9
address
address
Entry
Entry
6
6
4
3
— V
4
1 1 2
10
10
3
2
—
4
9
information
9
information —
1
—
LRU
0
6
0
6
LRU
REJ09B0292-0200
Section 8 Cache
4
3
— V
1 1 2
4
2
3
4
1
—
0
0