HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 617
HD6417616
Manufacturer Part Number
HD6417616
Description
32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417616.pdf
(935 pages)
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14.3
14.3.1
The SCIF can carry out serial communication in two modes: asynchronous mode in which
synchronization is achieved character by character, and synchronous mode in which
synchronization is achieved with clock pulses.
An IrDA block is also provided, enabling infrared communication conforming to IrDA 1.0 to be
executed by connecting an infrared transmission/reception unit.
Sixteen-stage FIFO buffers are provided for both transmission and reception, reducing the CPU
overhead and enabling fast, continuous communication to be performed.
Selection of asynchronous, synchronous, or IrDA mode and the transmission format is made by
means of the serial mode register (SCSMR) and IrDA mode register (SCIMR) as shown in table
14.8. The SCIF clock source is determined by a combination of the C/A bit in SCSMR, the
IRMOD bit in SCIMR, and the CKE1 and CKE0 bits in the serial control register (SCSCR), as
shown in table 14.9.
Asynchronous Mode
Synchronous Mode
Data length: Choice of 7 or 8 bits
Choice of parity addition, multiprocessor bit addition, and addition of 1 or 2 stop bits (the
combination of these parameters determines the transmit/receive format and character
length)
Detection of framing, parity, and overrun errors, receive FIFO data full and receive data
ready conditions, and breaks, during reception
Detection of transmit FIFO data empty condition during transmission
Choice of internal or external clock as SCIF clock source
When internal clock is selected: The SCIF operates on a clock with a frequency of 16, 8, or
4 times the bit rate of the baud rate generator, and can output this operating clock.
When external clock is selected: A clock with a frequency of 16, 8, or 4 times the bit rate
must be input (the built-in baud rate generator is not used).
Transmit/receive format: Fixed 8-bit data
Detection of overrun errors during reception
Choice of internal or external clock as SCIF clock source
When internal clock is selected: The SCIF operates on the baud rate generator clock and
can output a serial clock to external devices.
Overview
Operation
Section 14 Serial Communication Interface with FIFO (SCIF)
Rev. 2.00 Mar 09, 2006 page 591 of 906
REJ09B0292-0200
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