HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 83

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

3. Increment address registers: The Ax, Ay registers are address pointers. The value +2 is added
Each of the address pointers has an index register. The R8 register becomes the index register (Ix)
of the X memory address register (Ax), and the R9 register becomes the index register (Iy) of the
Y memory address register (Ay).
The X, Y data transfer instructions are processed in word lengths. X, Y data memory is accessed
in 16 bit lengths. This is why the increment processing adds 2 to the address registers. In order to
decrement, set –2 in the index register and designate add index register addressing. During X, Y
data addressing, only bits 1 to 15 of the address pointer are valid. Always write a 0 to bit 0 of the
address pointer and the index register during X, Y data addressing.
Figure 2.9 shows the X, Y data transfer addressing. When X memory and Y memory are accessed
using the X, Y bus, the upper word of Ax (R4 or R5) and Ay (R6 or R7) is ignored. The result of
@Ay+ and @Ay+Iy is stored in the lower word of Ay, and the upper word retains its original
value.
to each of them after the data transfer (post-update).
+2 (INC)
+0 (No update)
Notes:
All three addressing methods (increment, index register addition (Ix, Iy), and
no update) are post-updating methods. To decrement the address pointer, set
the index register to –2 or –4.
* Adder added for DSP addressing.
R8[Ix]
ALU
Figure 2.9 X, Y Data Transfer Addressing
R4[Ax]
R5[Ax]
+2 (INC)
+0 (No update)
Rev. 2.00 Mar 09, 2006 page 57 of 906
R9[Iy]
AU*
REJ09B0292-0200
Section 2 CPU
R6[Ay]
R7[Ay]