HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 351

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

7.6.2
When the CS3 space is set to DRAM, addresses are always multiplexed. This allows DRAMs that
require multiplexing of row and column addresses to be connected directly without additional
address multiplexing circuits. There are four ways of multiplexing, which can be selected using
the AMX1–AMX0 bits in MCR. Table 7.8 illustrates the relationship between the AMX1–AMX0
bits and address multiplexing. Address multiplexing is performed on address output pins A15–A1.
The original addresses are output to pins A24–A16. During DRAM accesses, AMX2 is reserved,
so set it to 0.
Table 7.8
Notes: 1. Address output pin A15 is high.
AMX1
0
1
2. Address output pins A15 and A14 are high.
Address Multiplexing
Relationship between AMX1–AMX0 and Address Multiplexing
AMX0
0
1
0
1
Figure 7.39 Example of DRAM Connection (16-Bit Data Width)
Chip
No. of Column
Address Bits
8 bits
9 bits
10 bits
11 bits
RD/WR
CAS1
CAS0
RAS
D15
D0
A9
A1
Row
Address Output
A23–A9
A24–A10
A24–A11 *
A24–A12 *
Rev. 2.00 Mar 09, 2006 page 325 of 906
Section 7 Bus State Controller (BSC)
1
2
256 k
A8
A0
RAS
OE
WE
I/O15
I/O0
UCAS
LCAS
Column
Address Output
A15–A1
A15–A1
A15–A1
A15–A1
DRAM
16-bit
REJ09B0292-0200