HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 384
HD6417616
Manufacturer Part Number
HD6417616
Description
32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417616.pdf
(935 pages)
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Section 8 Cache
8.1.1
Table 8.1 shows the cache register configuration.
Table 8.1
Name
Cache control register
8.2
8.2.1
The cache control register (CCR) is used for cache control. CCR must be set and the cache must
be initialized before use. CCR is initialized to H'00 by a power-on reset or manual reset.
Bits 7 and 6—Way Specification Bit (W1, W0): W1 and W0 specify the way when an address
array is directly accessed by address specification.
Rev. 2.00 Mar 09, 2006 page 358 of 906
REJ09B0292-0200
Bit 7: W1
0
1
Initial value:
Number of bits
Bit
Address
Register Configuration
Register Description
Cache Control Register (CCR)
Register Configuration
R/W:
Bit:
specification address
Bit 6: W0
0
1
0
1
Access space
31
3
R/W
W1
7
0
28
Figure 8.2 Address Configuration
CCR
Abbrev.
R/W
W0
6
0
Description
Way 0
Way 1
Way 2
Way 3
R/W
WB
5
0
19
Tag address
R/W
R/W
R/W
CP
4
0
Initial Value
H'00
R/W
TW
3
0
9
Entry address
6
R/W
OD
2
0
3
4
Address
H'FFFFFE92
Byte address
R/W
ID
in line
1
0
(Initial value)
0
R/W
CE
0
0
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