HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 12

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

6.7
6.8
Section 7 Data Transfer Controller (DTC)........................................................ 135
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
Section 8 I/O Ports ............................................................................................ 155
8.1
8.2
Rev. 2.0, 08/02, page x of xxxviii
Idle Cycle ..........................................................................................................................133
Bus Arbitration..................................................................................................................134
6.8.1
6.8.2
Features .............................................................................................................................135
Register Descriptions ........................................................................................................136
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.2.8
Activation Sources ............................................................................................................140
Location of Register Information and DTC Vector Table.................................................141
Operation...........................................................................................................................144
7.5.1
7.5.2
7.5.3
7.5.4
7.5.5
7.5.6
7.5.7
Procedures for Using DTC ................................................................................................151
7.6.1
7.6.2
Examples of Use of DTC ..................................................................................................152
7.7.1
7.7.2
Usage Notes.......................................................................................................................154
7.8.1
7.8.2
7.8.3
7.8.4
7.8.5
Overview ...........................................................................................................................155
Port 1 .................................................................................................................................160
8.2.1
Priority of Bus Masters ........................................................................................134
Bus Transfer Timing ............................................................................................134
DTC Mode Register A (MRA).............................................................................137
DTC Mode Register B (MRB) .............................................................................138
DTC Source Address Register (SAR) ..................................................................138
DTC Destination Address Register (DAR) ..........................................................138
DTC Transfer Count Register A (CRA)...............................................................138
DTC Transfer Count Register B (CRB) ...............................................................139
DTC Enable Registers (DTCER) .........................................................................139
DTC Vector Register (DTVECR) ........................................................................140
Normal Mode .......................................................................................................145
Repeat Mode ........................................................................................................145
Block Transfer Mode ...........................................................................................146
Chain Transfer......................................................................................................147
Interrupts ..............................................................................................................148
Operation Timing .................................................................................................149
Number of DTC Execution States........................................................................150
Activation by Interrupt .........................................................................................151
Activation by Software ........................................................................................151
Normal Mode .......................................................................................................152
Software Activation .............................................................................................153
Module Stop Mode Setting ..................................................................................154
On-Chip RAM......................................................................................................154
DTCE Bit Setting .................................................................................................154
Setting Required on Entering Subactive Mode or Watch Mode ..........................154
DTC Activation by Interrupt Sources of SCI, IIC, LPC, or A/D Converter ........154
Port 1 Data Direction Register (P1DDR) .............................................................160