HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 85

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HD6432160

Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Table 2.4
Instruction Size*
DIVXS
CMP
NEG
EXTU
EXTS
TAS*
Notes: 1. Size refers to the operand size.
2
2. When using the TAS instruction, use registers ER0, ER1, ER4 and ER5.
B: Byte
W: Word
L: Longword
Arithmetic Operations Instructions (2)
B/W
B/W/L
B/W/L
W/L
W/L
B
1
Function
Rd
Performs signed division on data in two general registers: either 16 bits
8 bits
quotient and 16-bit remainder.
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another general register
or with immediate data, and sets the CCR bits according to the result.
0 – Rd
Takes the two's complement (arithmetic complement) of data in a
general register.
Rd (zero extension)
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by padding with zeros on the
left.
Rd (sign extension)
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by extending the sign bit.
@ERd – 0, 1
Tests memory contents, and sets the most significant bit (bit 7) to 1.
Rs
8-bit quotient and 8-bit remainder or 32 bits
Rd
Rd
(<bit 7> of @ERd)
Rd
Rd
Rev. 2.0, 08/02, page 45 of 788
16 bits
16-bit

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