HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 37

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HD6432160

Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Table 12.3
Table 12.4
Table 12.5
Table 12.6
Section 13 Timer Connection
Table 13.1
Table 13.2
Table 13.3
Table 13.4
Table 13.5
Table 13.6
Table 13.7
Table 13.8
Table 13.9
Table 13.10
Table 13.11
Section 14 Watchdog Timer (WDT)
Table 14.1
Table 14.2
Section 15 Serial Communication Interface (SCI and IrDA)
Table 15.1
Table 15.2
Table 15.3
Table 15.4
Table 15.5
Table 15.6
Table 15.7
Table 15.8
Table 15.9
Table 15.10
Table 15.11
Section 16 I
Table 16.1
Table 16.2
Table 16.3
Table 16.4
Table 16.5
Table 16.6
Table 16.7
Table 16.8
Table 16.9
2
C Bus Interface (IIC) (Optional)
Input Capture Signal Selection..............................................................................289
Interrupt Sources of 8-Bit Timers TMR_0, TMR_1, TMR_Y, and TMR_X........290
Timer Output Priorities .........................................................................................294
Switching of Internal Clocks and TCNT Operation ..............................................295
Pin Configuration ..................................................................................................299
Synchronization Signal Connection Enable ..........................................................302
Registers Accessible by TMR_X/TMR_Y............................................................306
Examples of TCR Settings ....................................................................................309
Examples of TCORB (Pulse Width Threshold) Settings ......................................309
Examples of TCR and TCSR Settings...................................................................313
Examples of TCR, TCSR, TOCR, and OCRDM Settings ....................................315
Examples of TCR, TCSR, and TCORB Settings ..................................................316
Examples of OCRAR, OCRAF, TCORA, TCORB, TCR, and TCSR Settings ....318
HSYNCO Output Modes ......................................................................................320
VSYNCO Output Modes ......................................................................................321
Pin Configuration ..................................................................................................327
WDT Interrupt Source...........................................................................................335
Pin Configuration ..................................................................................................341
Relationships between N Setting in BRR and Bit Rate B .....................................350
BRR Settings for Various Bit Rates (Asynchronous Mode) .................................351
Maximum Bit Rate for Each Frequency (Asynchronous Mode)...........................354
Maximum Bit Rate with External Clock Input (Asynchronous Mode).................354
BRR Settings for Various Bit Rates (Clocked Synchronous Mode) .....................355
Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode).....355
Serial Transfer Formats (Asynchronous Mode) ....................................................358
SSR Status Flags and Receive Data Handling.......................................................365
IrCKS2 to IrCKS0 Bit Settings .............................................................................384
SCI Interrupt Sources ............................................................................................385
Pin Configuration ..................................................................................................396
Communication Format.........................................................................................400
I
Flags and Transfer States (Master Mode) .............................................................410
Flags and Transfer States (Slave Mode)................................................................412
I
Examples of Operation Using DTC ......................................................................451
IIC Interrupt Sources.............................................................................................454
I
2
2
2
C Transfer Rate ...................................................................................................403
C Bus Data Format Symbols...............................................................................425
C Bus Timing (SCL and SDA Outputs)..............................................................455
Rev. 2.0, 08/02, page xxxv of xxxviii

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