HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 531

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

18.3.3
IDR is a register in which data to be input from the host processor to the slave processor (this LSI)
is stored.
Bit
7
6
5
4
3
2
1
0
18.3.4
ODR is a register in which data to be output from the slave processor (this LSI) to the host
processor is stored.
Bit
7
6
5
4
3
2
1
0
Bit
Name
IDR7
IDR6
IDR5
IDR4
IDR3
IDR2
IDR1
IDR0
Bit
Name
ODR7
ODR6
ODR5
ODR4
ODR3
ODR2
ODR1
ODR0
Input Data Register (IDR)
Output Data Register 1 (ODR)
Initial
Value
Initial
Value
Slave
R
R
R
R
R
R
R
R
Slave
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Host
W
W
W
W
W
W
W
W
Host
R
R
R
R
R
R
R
R
Description
When &6Q (n = 1 to 4) is low, information on the
host data bus is written into IDR_n at the rising
edge of ,2:. The HA0 state is also latched into
the C/' bit in STR_n to indicate whether the
written information is a command or data.
Description
The ODR_n contents are output on the host
data bus when HA0 is low, &6Q (n = 1 to 4) is
low, and ,25 is low.
Rev. 2.0, 08/02, page 491 of 788