HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 802

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Rev. 2.0, 08/02, page 762 of 788
Item
5.6.5 DTC Activation by
Interrupt
Figure 5.8 DTC and
Interrupt Controller
5.7 Address Break
Section 6 Bus Controller
6.5.4 Wait Control
Figure 6.13 Example of
Wait State Insertion
Timing (Pin Wait Mode)
6.7 Idle Cycle
Figure 6.16 Examples of
Idle Cycle Operation
Section 7 Data Transfer
Controller (DTC)
7.1 Features
7.2.2 DTC Mode Register
B (MRB)
Page
106
107
to 110
131
133
135
138
Revisions (See Manual for Details)
Corrected.
Added.
Corrected.
Write
Corrected.
Address bus
Deleted.
Description of bit 6 (DISEL) added.
When this bit is set to 1, a CPU interrupt request is generated
every time data transfer ends (the DTC clears the interrupt
source flag for the activation source). When this bit is cleared
to 0, a CPU interrupt request is generated only when the
specified number of data transfer ends (the DTC does not
clear the interrupt source flag for the activation source).
Data bus
,
Usable for scan operations of CIN7 to CIN0
DTC operates in high-speed mode even when the LSI is in
medium-speed mode
Ø
Determination of
Data bus
(a) No idle cycle insertion
,
T
priority
1
Bus cycle A
Long output floating time
T
2
T
3
Bus cycle B
T
1
T
CPU interrupt
request vector
number
2
Data collision
Address bus
I,UI
Data bus
,
Ø
Write data
T
1
CPU
Bus cycle A
T
2
(b) Idle cycle insertion
T
3
T
I
Bus cycle B
T
1
T
2