HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 532

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

18.3.5
STR indicates status information during host interface processing.
Bit
7 to 4
3
2
1
0
Note:* Only 0 can be written, to clear the flag.
Rev. 2.0, 08/02, page 492 of 788
Bit
Name
DBU
C/'
DBU
IBF
OBF
Status Register (STR)
Initial
Value
All 0
0
0
0
0
Slave
R/W
R
R/W
R
R/(W)*
R/W
R
Host
R
R
R
R
Description
Defined by User
The user can use these bits as necessary.
Command/Data
Receives the HA0 input when the host
processor writes to IDR, and indicates whether
IDR contains data or a command.
0: Contents of input data register (IDR) are data
1: Contents of input data register (IDR) are a
command
Defined by User
The user can use these bits as necessary.
Input Buffer Full
This bit is an internal interrupt source to the
slave processor (this LSI).
The IBF flag setting and clearing conditions are
different when the fast A20 gate is used. For
details see table 18.5.
[Clearing Condition]
0: When the slave processor reads IDR
[Setting Condition]
1: When the host processor writes to IDR
Output Buffer Full
[Clearing Condition]
0: When the host processor reads ODR or the
slave writes 0 in the OBF bit
[Setting Condition]
1: When the slave processor writes to ODR