HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 159

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

RAME bit in SYSCR is set to 1, and disabled and specified as the external address space when the
RAME bit is cleared to 0.
6.4.4
The LSI can output I/O select signals (,26); the signal is driven low when the corresponding
external address space is accessed. Figure 6.2 shows an example of ,26 signal output timing.
Enabling or disabling ,26 signal output is performed by the IOSE bit in SYSCR. In extended
mode, the ,26 pin functions as an $6 pin by a reset. To use this pin as an ,26 pin, set the IOSE
bit to 1. For details, refer to section 8, I/O Ports.
The address ranges of the ,26 signal output can be specified by the IOS1 and IOS0 bits in BCR,
as shown in table 6.3.
Table 6.3
IOS1
0
1
I/O Select Signals
Address Range for ,26
IOS0
0
1
0
1
Address bus
Ø
Figure 6.2 ,26
,26 Signal Output Range
,26
H'(FF)F000 to H'(FF)F03F
H'(FF)F000 to H'(FF)F0FF
H'(FF)F000 to H'(FF)F3FF
H'(FF)F000 to H'(FF)F7FF
,26
,26
,26
,26
,26 Signal Output
T
1
,26 Signal Output Timing
,26
,26
External addresses selected by IOS
Bus cycle
T
2
Rev. 2.0, 08/02, page 119 of 788
T
3
(Initial value)