HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 554

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HD6432160

Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
19.3.2
Bits 6 to 0 in HICR2 control interrupts from the host interface (LPC) module to the slave
processor (this LSI). Bit 7 in HICR2 and HICR3 monitor host interface pin states.
The pin states can be monitored regardless of the host interface operating state or the operating
state of the functions that use pin multiplexing.
Rev. 2.0, 08/02, page 514 of 788
Bit
0
Bit
7
6
5
HICR2
Bit Name Initial Value Slave Host Description
LSCIB
Bit Name Initial Value Slave Host Description
GA20
LRST
SDWN
Host Interface Control Registers 2 and 3 (HICR2, HICR3)
0
Undefined
0
0
R/W
R
R/(W)* —
R/(W)* —
R/W
R/W
LSCI output Bit
Controls LSCI output in combination with the LSCIE
bit. For details, refer to description on the LSCIE bit
in HICR0.
GA20 Pin Monitor
LPC Reset Interrupt Flag
This bit is a flag that generates an ERRI interrupt
when an LPC hardware reset occurs.
0: [Clearing conditions]
1: [Setting condition]
LPC Shutdown Interrupt Flag
This bit is a flag that generates an ERRI interrupt
when an LPC hardware shutdown request is
generated.
0: [Clearing conditions]
1: [Setting condition]
Writing 0 after reading LRST = 1
LRESET pin falling edge detection
Writing 0 after reading SDWN = 1
LPC hardware reset and LPC software reset
LPCPD pin falling edge detection

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