HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 158
HD6432160
Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6432160.pdf
(829 pages)
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Table 6.2 shows the bus specifications for the basic bus interface of each area.
Table 6.2
Note:* Other than WMS1 = 0 and WMS0 = 1
6.4.2
The external address space is initialized as the basic bus interface and a 3-state access space. In
on-chip ROM enable extended mode, the address space other than on-chip ROM, on-chip RAM,
internal I/O registers, and their reserved areas is specified as the external address space. The on-
chip RAM and its reserved area are enabled when the RAME bit in SYSCR is set to 1. The on-
chip RAM and its reserved area are disabled and corresponding addresses are the external address
space when the RAME bit is cleared to 0.
6.4.3
The external address space is initialized as the basic bus interface and a 3-state access space. In
on-chip ROM disable extended mode, the address space other than on-chip RAM and internal I/O
registers is specified as the external address space. In on-chip ROM enable extended mode, the
address space other than on-chip ROM, on-chip RAM, internal I/O registers, and their reserved
areas is specified as the external address space. The on-chip RAM area is enabled when the
Rev. 2.0, 08/02, page 118 of 788
ABW
0
1
AST
0
1
0
1
Advanced Mode
Normal Mode
Bus Specifications for Basic Bus Interface
WMS1
—
0
—*
—
0
—*
WMS0
—
1
—*
—
1
—*
—
—
0
1
—
—
0
1
WC1
WC0
—
—
0
1
0
1
—
—
0
1
0
1
Bus Width
16
16
8
8
Bus Specifications
Number of
Access
States
2
3
3
2
3
3
Number of
Program
Wait
States
0
0
0
1
2
3
0
0
0
1
2
3
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