HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 135

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

NMI Interrupt: NMI is the highest-priority interrupt, and is always accepted by the CPU
regardless of the interrupt control mode or the status of the CPU interrupt mask bits. The NMIEG
bit in SYSCR can be used to select whether an interrupt is requested at a rising edge or a falling
edge on the NMI pin.
IRQ7 to IRQ0 Interrupts: Interrupts IRQ7 to IRQ0 are requested by an input signal at pins ,54:
to ,543. Interrupts IRQ7 to IRQ0 have the following features:
The detection of IRQ7 to IRQ0 interrupts does not depend on whether the relevant pin has been
set for input or output. However, when a pin is used as an external interrupt input pin, do not clear
the corresponding DDR to 0 to use the pin as an I/O pin for another function.
A block diagram of interrupts IRQ7 to IRQ0 is shown in figure 5.3.
The interrupt exception handling for interrupt requests IRQ7 to IRQ0 can be started at an
independent vector address.
Using ISCR, it is possible to select whether an interrupt is generated by a low level, falling
edge, rising edge, or both edges, at pins ,54: to ,543.
Enabling or disabling of interrupt requests IRQ7 to IRQ0 can be selected with IER.
Interrupt control levels can be specified by the ICR settings.
The status of interrupt requests IRQ7 to IRQ0 is indicated in ISR. ISR flags can be cleared to 0
by software.
n = 7 to 0
input
Figure 5.3 Block Diagram of Interrupts IRQ7 to IRQ0
IRQnSCA, IRQnSCB
detection circuit
Edge/level
Clear signal
R
S
IRQnF
Q
IRQnE
Rev. 2.0, 08/02, page 95 of 788
IRQn interrupt
request