AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 164

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

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AMD
LAFM
PAM
BAM
set the PCnet-PCI II controller
and cleared by the host.
This bit does not exist, when the
PCnet-PCI II controller is pro-
grammed to use 16-bit software
structures for the descriptor ring
entries
SWSTYLE is cleared to ZERO).
Physical Address Match is set by
the PCnet-PCI II controller when
it accepts the received frame due
to a match of the frame’s
destination address with the con-
tent of the physical address
register. PAM is valid only when
ENP is set. PAM is set by the
PCnet-PCI
cleared by the host.
This bit does not exist when the
PCnet-PCI II controller is pro-
grammed to use 16-bit software
structures for the descriptor ring
entries
SWSTYLE is cleared to ZERO).
Logical Address Filter Match is
set by the PCnet-PCI II controller
when it accepts the received
frame based on the value in the
logical address filter register.
LAFM is valid only when ENP
is
the PCnet-PCI II controller and
cleared by the host.
Note that if DRCVBC (CSR15, bit
14) is cleared to ZERO, only
BAM, but not LAFM will be set
when a Broadcast frame is re-
ceived, even if the Logical Ad-
dress Filter is programmed in
such a way that a Broadcast
frame would pass the hash filter.
If DRCVBC is set to ONE and
the Logical Address Filter is
programmed in such a way that a
Broadcast frame would pass
the hash filter, LAFM will be
set on the reception of a
Broadcast frame.
This bit does not exist when the
PCnet-PCI II controller is pro-
grammed to use 16-bit software
structures for the descriptor ring
entries
SWSTYLE is cleared to ZERO).
Broadcast Address Match is set
by the PCnet-PCI II controller
when it accepts the received
frame because the frame’s desti-
nation address is of the type
set.
(BCR20,
(BCR20,
(BCR20,
LAFM
II
controller
is
bits
bits
bits
P R E L I M I N A R Y
set
7–0,
7–0,
7–0,
Am79C970A
and
by
19–16 RES
15–12 ONES
11–00 BCNT
RMD2
Bit
31–24 RCC
23–16 RPC
Name
“Broadcast”. BAM is valid only
when ENP is set. BAM is set by
the PCnet-PCI II controller and
cleared by the host.
This bit does not exist when the
PCnet-PCI II controller is pro-
grammed to use 16-bit software
structures for the descriptor ring
entries
SWSTYLE is cleared to ZERO).
Reserved
locations should be read and
written as ZEROs.
These four bits must be written
as ONEs. They are written by the
host and unchanged by the
PCnet-PCI II controller.
Buffer Byte Count is the length of
the buffer pointed to by this de-
scriptor, expressed as the two’s
complement of the length of the
buffer. This field is written by the
host and unchanged by the
PCnet-PCI II controller.
Description
Receive Collision Count. Indi-
cates the accumulated number of
collisions detected on the net-
work since the last packet was
received, excluding collisions
that occurred during transmis-
sions from this node. The
PCnet-PCI II controller imple-
mentation of this counter may not
be compatible with the ILACC
RCC definition. If network statis-
tics are to be monitored, then
CSR114 should be used for the
purpose of monitoring receive
collisions instead of these bits.
Runt Packet Count. Indicates the
accumulated number of runts
that were addressed to this node
since the last time that a receive
packet was successfully re-
ceived and its corresponding
RMD2 ring entry was written to
by the PCnet-PCI II controller. In
order to be included in the RPC
value, a runt must be long
enough to meet the minimum re-
quirement of the internal address
matching logic. The minimum re-
quirement for a runt to pass the
internal
mechanism is: 18 bits of valid
(BCR20,
address
locations.
bits
matching
These
7–0,