AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 87

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

transmitting, receiving, or in a collision state with both
functions active simultaneously. These signals are in-
ternal signals that can be programmed to appear on any
of the LED output pins. Programming is done by writing
to BCR4 to BCR7.
In the Link Fail state, XMT, RCV and COL are inactive.
Collision Detection Function
Activity on both twisted pair signals RXD and TXD at
the same time constitutes a collision, thereby causing
the internal COL signal to be activated. COL will remain
active until one of the two colliding signals changes from
active to idle. However, transmission attempt in Link Fail
state results in LCAR and CERR indication. COL stays
active for 2 bit times at the end of a collision.
Signal Quality Error Test Function
The Signal Quality Error (SQE) test function (also called
Heartbeat) is disabled when the 10BASE-T port
is selected.
Jabber Function
The Jabber function prevents the twisted pair transmit
function of the T-MAU TXD from being active for an ex-
cessive period of time (20 ms to 150 ms). This prevents
any one node from disrupting the network due to a
“stuck-on” or faulty transmitter. If this maximum transmit
time is exceeded, the T-MAU transmitter circuitry is
disabled, the JAB bit is set (CSR4, bit 1) and the COL
signal is asserted. Once the transmit data stream is re-
moved, the T-MAU waits an “unjab” time of 250 ms to
750 ms before it deasserts COL and re-enables the
transmit circuitry.
PCnet–PCI II
RXD+
TXD+
TXP+
RXD-
TXD-
TXP-
Figure 38. 10BASE-T Interface Connection
61.9
61.9
422
422
P R E L I M I N A R Y
Am79C970A
1.21 K
100
Power Down
The T-MAU circuitry can be made to go into a power
savings mode. The T-MAU will go into the power down
mode when H_RESET is active, when coma mode is ac-
tive, or when the T-MAU is not selected. Refer to the
section “Power Savings Modes” for descriptions of the
various power down modes.
Any of the three conditions listed above resets the inter-
nal logic of the T-MAU and places the device into power
down mode. In this mode, the Twisted Pair driver pins
(TXD , TXP ) are driven LOW, and the internal T-MAU
status signals (LNKST, RCVPOL, XMT, RCV and COL)
signals are inactive.
After coming out of the power down mode, the T-MAU
will remain in the reset state for an additional 10 s. Im-
mediately after the reset condition is removed, the
T-MAU will be forced into the Link Fail state. The T-MAU
will move to the Link Pass state only after 5–6 link beat
pulses and/or a single received message is detected on
the RD pair.
In snooze mode, the T-MAU receive circuitry will remain
enabled even while the SLEEP pin is driven LOW.
10BASE-T Interface Connection
The figure below shows the proper 10BASE-T network
interface design. Refer to Appendix A for a list of com-
patible 10BASE-T filter/transformer modules.
Note that the recommended resistor values and filter
and transformer modules are the same as those used by
the IMR+ (Am79C981).
Filter
Filter
RCV
XMT
Transformer
Module
Filter &
1:1
1:1
Connector
RD+
RD-
TD+
TD-
RJ45
19436A-41
1
2
3
6
AMD
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