AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 52

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

Preemption During Burst Transaction
When the PCnet-PCI II controller operates in burst
mode, it only performs a single transaction per bus mas-
tership period, where transaction is defined as one ad-
dress phase and one or multiple data phases. The
central arbiter can remove GNT at any time during the
transaction. The PCnet-PCI II controller will ignore the
deassertion of GNT and continue with data transfers, as
long as the PCI Latency Timer is not expired. When the
Latency Timer is ZERO and GNT is deasserted, the
PCnet-PCI II controller will finish the current data phase,
deassert FRAME, finish the last data phase and release
the bus. If EXTREQ (BCR18, bit 8) is cleared to ZERO, it
will immediately assert REQ to regain bus ownership as
52
AMD
DEVSEL
FRAME
TRDY
IRDY
C/BE
REQ
GNT
PAR
CLK
AD
1
DEVSEL is sampled
Figure 21. Preemption During Burst Transaction
2
ADDR
0111
3
P R E L I M I N A R Y
DATA
PAR
Am79C970A
4
DATA
PAR
soon as possible. If EXTREQ is set to ONE, REQ will
stay asserted. When the preemption occurs after the
counter has counted down to ZERO, the PCnet-PCI II
controller will finish the current data phase, deassert
FRAME, finish the last data phase and release the bus.
Note that it is important for the host to program the PCI
Latency Timer according to the bus bandwidth require-
ment of the PCnet-PCI II controller. The host can deter-
mine this bus bandwidth requirement by reading the PCI
MAX_LAT and MIN_GNT registers.
The figure below assumes that the PCI Latency Timer
has counted down to ZERO on clock 7.
5
BE
DATA
PAR
6
DATA
PAR
7
DATA
PAR
8
PAR
9
19436A-24