AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 181

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

SWITCHING CHARACTERISTICS: GPSI
Transmit Timing
Receive Timing
Notes:
1. CLSN must be asserted for a continuous period of 110 ns or more. Assertion for less than 110 ns period may or may not
2. RXCLK should meet jitter requirements of IEEE 802.3 specification.
3. CLSN assertion before 51.2 s will be indicated as a normal collision. CLSN assertion after 51.2 s will be considered as a
Parameter
result in CLSN recognition.
Late Receive Collision.
Symbol
tGPR10
tGPR11
tGPR12
tGPT1
tGPT2
tGPT3
tGPT4
tGPT5
tGPT6
tGPT7
tGPT8
tGPT9
tGPR1
tGPR2
tGPR3
tGPR4
tGPR5
tGPR6
tGPR7
tGPR8
tGPR9
Parameter Name
TXCLK Period (802.3 Compliant)
TXCLK HIGH Time
TXDAT and TXEN Delay from
RXEN Setup Before
RXEN Hold After
CLSN Active Time to Trigger Collision
CLSN Active to
Prevent LCAR Assertion
CLSN Active to
SQE Heartbeat window
CLSN Active to
Normal Collision
RXCLK Period
RXCLK HIGH Time
RXCLK LOW Time
RXDAT and RXEN Setup to
RXDAT Hold after
RXEN Hold after
CLSN Active to First
(Collision Recognition)
CLSN Active to
for Address Type Designation Bit
CLSN Setup to Last
Collision Recognition
CLSN Active
CLSN Inactive Setup to First
CLSN Inactive Hold to Last
TXCLK
TXCLK (Last Bit)
RXEN to
RXEN for
RXEN for
RXCLK
RXCLK
TXEN
RXCLK
RXCLK for
RXCLK
P R E L I M I N A R Y
RXCLK
RXCLK
RXCLK
Am79C970A
@ 1.5 V (Note 1)
@ 1.5 V (Note 2)
@ 2.0 V (Note 2)
@ 0.8 V (Note 2)
@ 1.5 V (Note 3)
Test Condition
@ 1.5 V
@ 2.0 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
99.99
51.2
Min
210
110
210
110
300
300
40
15
80
30
30
15
15
0
0
0
0
0
0
100.01
Max
120
4.0
60
70
80
80
AMD
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
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