AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 98

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

Instruction Register and Decoding Logic
After the TAP FSM is reset, the IDCODE instruction is
always invoked. The decoding logic gives signals to
control the data flow in the Data registers according to
the current instruction.
Boundary Scan Register
Each Boundary Scan Register (BSR) cell has two
stages. A flip-flop and a latch are used for the Serial Shift
Stage and the Parallel Output Stage, respectively.
There are four possible operation modes in the
BSR cell:
98
1
2
3
4
Instruction Name
AMD
Table 15. Boundary Scan Register Mode
SAMPLE
EXTEST
SETBYP
BYPASS
IDCODE
TRIBYP
Capture
Shift
Update
System Function
Of Operation
Instruction Code
Table 14. IEEE 1149.1 Supported Instruction Summary
0000
0001
0010
0011
0100
1111
P R E L I M I N A R Y
Control Boundary To 1/0
ID Code Inspection
Am79C970A
Sample Boundary
External Test
Bypass Scan
Description
Force Float
Other Data Registers
1. Bypass Register (1 bit)
2. Device ID register (32 bits)
Note that the content of the Device ID register is the
same as the content of CSR88.
Bits 31–28
Bits 27–12
Bits 11–1
Bit 0
Table 16. Device ID Register
Normal
Normal
Normal
Normal
Mode
Test
Test
Version
Part Number (0010 0100 0011 XXXX)
Manufacturer ID. The 11 bit
manufacturer ID cod for AMD is
00000000001 in accordance with
JEDEC publication 106-A.
Always a logic 1
Selected Data Register
ID REG
Bypass
Bypass
Bypass
BSR
BSR