ORT8850H AGERE [Agere Systems], ORT8850H Datasheet - Page 44

• Manufacturer Part Number: ORT8850H
• Description: Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
• Manufacturer: AGERE [Agere Systems]

ORCA ORT8850 FPSC
Eight-Channel x 850 Mbits/s Backplane Transceiver
Memory Map
Table 11. Memory Map (continued)
44
32, 4a,
62, 7a,
92, aa,
33, 4b,
63, 7b,
93, ab,
35, 4d,
CDR Specific Registers
Pi-Sched Registers
34, 4c,
64, 7c,
94, ac,
ADDR
36, 4e,
66, 7e,
96, ae,
c2, da
c3, db
c4, dc
c5, dd
c6, de
37, 4f,
67, 7f,
97, af,
c7, df
[7:0]
7d,
ad,
65,
95,
e0
e3
f0
f1
f2
Register
counter
counter
counter
counter
Type
creg
creg
creg
creg
creg
sreg
creg
Reserved
(continued)
overflow
overflow
overflow
DB7
—
—
—
—
Loopback
RapidIO
MODE
enable
(shim)
DB6
TST
—
—
—
—
(Reserved)
OPIMODE
BYPASS
Disable
Framer
DB5
—
—
—
LVDS link b1 BIP-8 parity error counter
Sampler phase error count
LOOP
BKEN
ENCOMMA[0:7]
DB4
A1 A2 frame error counter
—
—
Sync control
LOF counter
PHASE
DB3
TST
—
—
FIFO depth register
OCELLSIZE[3:7]
redun-
LVDS
select
DB2
dant
—
—
—
Alignment
ITESTDO
IBYPASS
EN10BIT
Bypass
FIFO +
Pointer
Mover
DB1
NE
OTEST
Bypass
Pointer
Mover
ITEST
PASS
Mode
MSB
Shim
DB0
ENB
Agere Systems Inc.
Reset
Value
August 2001
[7:0]
0x0c
00
00
00
00
00
—
—
—
—
0
Data Sheet
Comments
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—
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—
—
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