ORT8850H AGERE [Agere Systems], ORT8850H Datasheet - Page 54

• Manufacturer Part Number: ORT8850H
• Description: Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
• Manufacturer: AGERE [Agere Systems]

ORCA ORT8850 FPSC
Eight-Channel x 850 Mbits/s Backplane Transceiver
Memory Map
Table 12. Memory Map Descriptions (continued)
54
CDR control register 1
Pi-Sched I/F status regis-
Pi-Sched I/F Ctl register
Pi-Sched I/F Ctl register
Bit/Register Name(S)
CDR control register 1
CDR control register 4
ter
(continued)
Location
0xe3[0:7]
Register
0xf0[0:4]
0xe0[6]
0xe0[5]
0xe0[4]
0xe0[3]
0xe0[1]
0xe0[0]
0xf0[6]
0xf0[5]
0xf1[0]
0xf1[1]
0xf2[0]
0xf2[1]
(Hex)
Bit/
Register
Type
creg
creg
creg
creg
creg
creg
creg
creg
creg
creg
sreg
sreg
creg
creg
Reset
Value
(Hex)
0
0
0
0
0
0
0
0
0
0
Enables CDR test mode. Initiates CDR’s built-in self-
test:
0: Regular mode.
1: Test mode.
Enables bypassing of the 622 MHz clock synthesis
with TSTCLK.
0: Use PLL.
1: Bypass PLL (uses TSTCLK as reference clock).
Enables LVDS loopback.
0: No loopback.
1: Loopback.
When set to 1, controls bypass of 16 PLL generated
phases with 16 low-speed phases.
1 = 10:1 MUX/deMUX.
0 = 8:1 MUX/deMUX.
0 = Long-haul I/F mode (enables CDR + STM opera-
tion).
1 = Short-haul I/F mode (disables CDR, enables Pi-
sched interfaces).
Enables 10-bit Ethernet word alignment per channel.
Used during internal built-in self-test mode:
0 = No loopback.
1 = Loopback.
Reserved bit (read-only):
0 = Shuts down Bidi logic and ignores auxiliary
bypass signals. Always set to 0.
Indicates minimum cell size and will be used to detect
cell underrun errors.
Indicates completion of the internal test. Only valid
when OTESTENB (0xf2[7] is high):
0 = Test running.
1 = Test complete.
Indicates success of the internal test. Valid only when
ITESTDONE is high:
0 = Test failed.
1 = Test passed.
Enables bypass of the PLL circuit. TSTCLK is used in
this mode.
1 = Enables internal self-test of the SHIM block. Both
internal and external loopback paths exist during this
test.
EN10BIT. Sets 10 to 1 MUX/deMUX:
Description
Agere Systems Inc.
August 2001
Data Sheet