H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 105

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
5.3.2
ABRKCR controls the address breaks. When both the CMF flag and BIE flag are set to 1, an
address break is requested.
Bit
7
6
to
1
0
5.3.3
The BAR registers specify an address that is to be a break address. An address in which the first
byte of an instruction exists should be set as a break address. In normal mode, addresses A23 to
A16 are not compared.
Bit
7
to
0
BARA
Bit Name
CMF
BIE
Bit Name
A23
to
A16
Address Break Control Register (ABRKCR)
Break Address Registers A to C (BARA to BARC)
Initial Value
0
All 0
0
Initial Value
All 0
R/W
R
R
R/W
R/W
R/W
Description
Condition Match Flag
Address break source flag. Indicates that an
address specified by BARA to BARC is
prefetched.
[Setting condition]
When an address specified by BARA to BARC
is prefetched while the BIE flag is set to 1.
[Clearing condition]
When an exception handling is executed for
an address break interrupt.
Reserved
These bits are always read as 0 and cannot be
modified.
Break Interrupt Enable
Enables or disables address break.
0: Disabled
1: Enabled
Description
Addresses 23 to 16
The A23 to A16 bits are compared with A23 to
A16 in the internal address bus.
Rev. 2.00 Mar 21, 2006 page 67 of 518
Section 5 Interrupt Controller
REJ09B0299-0200

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