H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 377

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

IFKEY10A_000020020800
This LSI has three on-chip keyboard buffer controller channels. The keyboard buffer controller is
provided with functions conforming to the PS/2 interface specifications.
Data transfer using the keyboard buffer controller employs a data line (KD) and a clock line
(KCLK), providing economical use of connectors, board surface area, etc. Figure 14.1 shows a
block diagram of the keyboard buffer controller.
14.1
Conforms to PS/2 interface specifications
Direct bus drive (via the KCLK and KD pins)
Interrupt sources: on completion of data reception and on detection of clock edge
Error detection: parity error and stop bit monitoring
Features
KD
(PS2AD,
PS2BD,
PS2CD)
KCLK
(PS2AC,
PS2BC,
PS2CC)
Legend:
KD:
KCLK:
KBBR:
KBCRH: Keyboard control register H
KBCRL: Keyboard control register L
Section 14 Keyboard Buffer Controller
Figure 14.1 Block Diagram of Keyboard Buffer Controller
KBC data I/O pin
KBC clock I/O pin
Keyboard data buffer register
Control
logic
KDI
KCLKI
Parity
KDO
KCLKO
Register counter value
KBI interrupt
KBCRH
KBCRL
KBBR
Rev. 2.00 Mar 21, 2006 page 339 of 518
Section 14 Keyboard Buffer Controller
REJ09B0299-0200
Internal
data bus