H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 253

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Internal reset signal
Note: * After the OVF bit becomes 1, it is cleared to 0 by an internal reset.
Legend:
WT/IT
TME
OVF
RESO signal
Figure 11.2 Watchdog Timer Mode (RST/NMI
H'FF
H'00
: Timer mode select bit
: Timer enable bit
: Overflow flag
The XRST bit is also cleared to 0.
TCNT value
WT/IT = 1
TME = 1
Write H'00 to
TCNT
RESO and internal
reset signals generated
132 system clocks
518 system clocks
Overflow
OVF = 1*
Rev. 2.00 Mar 21, 2006 page 215 of 518
NMI
NMI
NMI = 1) Operation
Section 11 Watchdog Timer (WDT)
WT/IT = 1
TME = 1
Write H'00 to
TCNT
REJ09B0299-0200
Time

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