H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 226

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 10 8-Bit Timer (TMR)
TCSR_Y
3
2
Rev. 2.00 Mar 21, 2006 page 188 of 518
REJ09B0299-0200
Bit
7
6
5
4
Bit Name Initial Value R/W
CMFB
CMFA
OVF
ICIE
OS3
OS2
0
0
0
1
0
0
R/(W) *
R/(W) *
R/(W) *
R/W
R/W
R/W
1
1
1
Output Select 3, 2
These bits specify how the TMOY pin *
be changed by compare-match B of TCORB_Y and
TCNT_Y.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
Description
Compare-Match Flag B
[Setting condition]
When the values of TCNT_Y and TCORB_Y match
[Clearing condition]
Read CMFB when CMFB = 1, then write 0 in CMFB
Compare-Match Flag A
[Setting condition]
When the values of TCNT_Y and TCORA_Y match
[Clearing condition]
Read CMFA when CMFA = 1, then write 0 in CMFA
Timer Overflow Flag
[Setting condition]
When TCNT_Y overflows from H'FF to H'00
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
Input Capture Interrupt Enable
Enables or disables the ICF interrupt request (ICIX) when
the ICF bit in TCSR_X is set to 1.
0: ICF interrupt request (ICIX) is disabled
1: ICF interrupt request (ICIX) is enabled
2
output level is to

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