H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 420
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
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Section 15 Host Interface LPC Interface (LPC)
Bit
4
3
Rev. 2.00 Mar 21, 2006 page 382 of 518
REJ09B0299-0200
Bit Name Initial Value Slave Host Description
SMIE3B
SMIE3A
0
0
R/W
R/W
R/W
—
—
Host SMI Interrupt Enable 3B
Enables or disables a host SMI interrupt request
when OBF3B is set by a TWR15 write.
0: Host SMI interrupt request by OBF3B and SMIE3B
is disabled
[Clearing conditions]
1: [When IEDIR = 0]
[Setting condition]
Writing 1 after reading SMIE3B = 0
Host SMI Interrupt Enable 3A
Enables or disables a host SMI interrupt request
when OBF3A is set by an ODR3 write.
0: Host SMI interrupt request by OBF3A and SMIE3A
is disabled
[Clearing conditions]
1: [When IEDIR = 0]
[Setting condition]
Writing 1 after reading SMIE3A = 0
Writing 0 to SMIE3B
LPC hardware reset, LPC software reset
Clearing OBF3B to 0 (when IEDIR = 0)
Host SMI interrupt request by setting OBF3B to 1
is enabled
[When IEDIR = 1]
Host SMI interrupt is requested
Writing 0 to SMIE3A
LPC hardware reset, LPC software reset
Clearing OBF3A to 0 (when IEDIR = 0)
Host SMI interrupt request by setting OBF3A to 1
is enabled
[When IEDIR = 1]
Host SMI interrupt is requested
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