H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 74

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 2 CPU
Table 2.9
Instruction
TRAPA
RTE
SLEEP
LDC
STC
ANDC
ORC
XORC
NOP
Note: * Size refers to the operand size.
Rev. 2.00 Mar 21, 2006 page 36 of 518
REJ09B0299-0200
B: Byte
W: Word
System Control Instructions
Size *
B/W
B/W
B
B
B
Function
Starts trap-instruction exception handling.
Returns from an exception-handling routine.
Causes a transition to a power-down state.
(EAs)
Moves the memory operand contents or immediate data to CCR or
EXR. Although CCR and EXR are 8-bit registers, word-size transfers
are performed between them and memory. The upper 8 bits are valid.
CCR
Transfers CCR or EXR contents to a general register or memory
operand. Although CCR and EXR are 8-bit registers, word-size
transfers are performed between them and memory. The upper 8 bits
are valid.
CCR
Logically ANDs the CCR or EXR contents with immediate data.
CCR
Logically ORs the CCR or EXR contents with immediate data.
CCR
Logically exclusive-ORs the CCR or EXR contents with immediate data.
PC + 2
Only increments the program counter.
#IMM
#IMM
#IMM
(EAd), EXR
CCR, (EAs)
PC
CCR, EXR
CCR, EXR
CCR, EXR
(EAd)
EXR
#IMM
#IMM
#IMM
EXR
EXR
EXR

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