H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 142

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 7 I/O Ports
OS3 to OS0
P41DDR
Pin Function
P40DDR
Pin Function
Note: * When an external clock is selected with bits CKS2 to CKS0 in TCR0 of TMR_0, this pin is
7.6
Port 5 is a 3-bit I/O port. Port 5 pins also function as SCI_1 extended I/O pins, and the IIC_0 I/O
pin. P52 and ExSCK1 are NMOS push-pull outputs, and SCL0 is an NMOS open-drain output.
Port 5 has the following registers.
7.6.1
P5DDR specifies input or output for the pins of port 5 on a bit-by-bit basis.
Bit
7
to
3
2
1
0
Rev. 2.00 Mar 21, 2006 page 104 of 518
REJ09B0299-0200
P41/TMO0
The pin function is switched as shown below according to the combination of the OS3 to OS0
bits in TCSR of TMR_0 and the P41DDR bit.
P40/TMCI0
The pin function is switched as shown below according to the status of the P40DDR bit.
Port 5 data direction register (P5DDR)
Port 5 data register (P5DR)
used as the TMCI0 input pin.
Bit Name
P52DDR
P51DDR
P50DDR
Port 5
Port 5 Data Direction Register (P5DDR)
Initial Value
All 1
0
0
0
P41 input pin
0
P40 input pin
R/W
W
W
W
0
All 0
Description
Reserved
The initial value should not be changed.
The corresponding port 5 pins are output ports
when P5DDR bits are set to 1, and input ports
when cleared to 0. As SCI_1 is initialized in
software standby mode, the pin states are
determined by the IIC_0 ICCR, P5DDR, and P5DR
specifications.
TMCI0 input pin *
P41 output pin
1
P40 output pin
TMO0 output pin
1
Not all 0

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