H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 379
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
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14.3
The keyboard buffer controller has the following registers for each channel.
14.3.1
KBCRH indicates the operating status of the keyboard buffer controller.
Bit
7
6
5
4
Keyboard control register H (KBCRH)
Keyboard control register L (KBCRL)
Keyboard data buffer register (KBBR)
Bit Name
KBIOE
KCLKI
KDI
KBFSEL
Register Descriptions
Keyboard Control Register H (KBCRH)
Initial Value
0
1
1
1
R/W
R/W
R
R
R/W
Description
Keyboard In/Out Enable
Selects whether or not the keyboard buffer controller
is used.
0: The keyboard buffer controller is non-operational
(KCLK and KD signal pins have port functions)
1: The keyboard buffer controller is enabled for
transmission and reception (KCLK and KD signal pins
are in the bus drive state)
Keyboard Clock In
Monitors the KCLK I/O pin. This bit cannot be
modified.
0: KCLK I/O pin is low
1: KCLK I/O pin is high
Keyboard Data In:
Monitors the KDI I/O pin. This bit cannot be modified.
0: KD I/O pin is low
1: KD I/O pin is high
Keyboard Buffer Register Full Select
Selects whether the KBF bit is used as the keyboard
buffer register full flag or as the KCLK fall interrupt
flag. When KBFSEL is cleared to 0, the KBE bit in
KBCRL should be cleared to 0 to disable reception.
0: KBF bit is used as KCLK fall interrupt flag
1: KBF bit is used as keyboard buffer register full flag
Rev. 2.00 Mar 21, 2006 page 341 of 518
Section 14 Keyboard Buffer Controller
REJ09B0299-0200
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