H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 356

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 I
(master output)
Rev. 2.00 Mar 21, 2006 page 318 of 518
REJ09B0299-0200
(master output)
(master output)
(slave output)
(master output)
(slave output)
User processing
User processing
SDA
SCL
ICDRR
ICDRF
ICDRS
SDA
IRIC
SDA
ICDRS
ICDRR
SDA
ICDRF
SCL
IRIC
Data n - 2
Start condition issuance
Data n - 2
Bit 0
8
2
Figure 13.21 Example of Slave Receive Mode Operation Timing (1)
Figure 13.22 Example of Slave Receive Mode Operation Timing (2)
C Bus Interface (IIC)
[11]
A
9
Bit 7
[13] IRIC clear
1
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
2
[9] Wait for one frame
3
Data n - 2
Data n - 1
Bit 7
1
4
(MLS = ACKB = 0, HNDS = 0)
(MLS = ACKB = 0, HNDS = 0)
5
Bit 6
2
6
Bit 5
Bit 1 Bit 0
3
Slave address
7
Address + R/W
Bit 4
8
[9] Set ACKB = 1
Data n - 1
4
[11]
9
A
Bit 3
[10] ICDR read
5
[13] IRIC clear
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
(Data n - 2)
1
Bit 2
6
2
Bit 1
7
3
[10] ICDR read
Bit 0
R/W
4
(Data n - 1)
8
Data n - 1
Data n
5
9
[6]
A
6
Address + R/W
[7]
Bit 7
1
7
[8] IRIC clear
[13] IRIC clear
Data 1
8
Data 1
Bit 6
2
[11]
9
A
[10] ICDR read
Start condition detection
[14] ICDR read
Bit 5
3
(Data n)
Data n
Data n
[15] IRIC clear
Bit 4
4
[11]